Custom Peripherals Surround Cortex-M0 Platform

April 16, 2013

Cypress Semiconductor's PSoC 4 brings the Cortex-M0 to the PSoC family delivering low cost, 32-bit processing power with customizable peripherals.

William G. Wong

Design West 2013

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Cypress Semiconductor's PSoC 4 brings the Cortex-M0 to the PSoC family delivering low cost, 32-bit processing power with customizable peripherals (see figure). It complements the original PSoC and the 8051-based PSoC 3 family (see PSoC Development Hardware). It also has an upgrade path to the PSoC 5 family based on the Arm Cortex-M3 processor.

The PSoC family is based on configurable digital and analog peripherals that can be connected to almost any I/O pin providing a designer flexibility only exceeded by an FPGA. Customizing the PSoC peripherals using PSoC Creator is significantly easier than programming an FPGA. Typically a developer will select from a large set of predefined peripherals and simply configure settings as necessary and link the logical I/O to physical ports.

Figure 1. The PSoC 4 family is based on Arm's Cortex-M0 that competes with 8- and 16-bit platforms while retaining the PSoC configurable peripheral architecture.

The PSoC 4 a 12-bit SAR ADC with a 1 Msample/s rate. It has zero-overhead sequencing and can handle differential configurations. The analog support can also constructs DACs. Other components in the configurable analog interface include op amps, comparators and precision voltage references. Cypress' CapSense capacitive touch support is also available with the platform. This includes the SmartSense auto-tuning feature.

The analog components can be combined with the configurable digital components to handle complex applications such as motor control by offloading the processor. The digital components can be used to build a range of devices like specialized serial communication interfaces. There are some hard core interfaces such as SPI, I²C and UARTs that are available as well. LCD support is optional.

Low cost and low power are where the PSoC 4 excels. It uses 20 nA in the lowest power, stop mode. SRAM can be maintained in the low power sleep mode using only 150 nA.

The PSoC 4 is going to give the PSoC 3 some major competition. Existing designs will likely stay on the 8051 platform but new designs will take advantage of the 32-bit platform and the migration path to the PSoC 5.

About the Author

William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

I am Editor of Electronic Design focusing on embedded, software, and systems. As Senior Content Director, I also manage Microwaves & RF and I work with a great team of editors to provide engineers, programmers, developers and technical managers with interesting and useful articles and videos on a regular basis. Check out our free newsletters to see the latest content.

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I earned a Bachelor of Electrical Engineering at the Georgia Institute of Technology and a Masters in Computer Science from Rutgers University. I still do a bit of programming using everything from C and C++ to Rust and Ada/SPARK. I do a bit of PHP programming for Drupal websites. I have posted a few Drupal modules.

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