Q&A: Spansion’s Dr. Saied Tehrani Discusses HyperBus MCUs
Telematics, already a challenging automotive cluster application, becomes more difficult as cost and reliability come into play. I talked with Dr. Saied Tehrani about this and Spansion’s latest microcontroller that features a HyperBus interface to access off-chip memory.
Wong: How do you see the automotive cluster space with respect to functionality?
Tehrani: The basic functionality of instrument clusters remains the same—the system provides critical driver information in a real-time environment. The changes we see are related to performance, a shift from mechanical to digital instrumentation, and richer graphical displays with user-determined “look and feel” elements.
The most important drivers in terms of functionality in cluster are safety (ASIL) and interconnectivity (HUD, telemetrics, navigation, and other driver info sourced from center stack).
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Functional safety and integration of ASIL A through D is a critical design consideration for instrument cluster MCU architecture going forward. The design considerations given to functional safety are not trivial. They are complex and have a measurable impact on the hardware and software complexities, overhead, and costs of cluster MCU design.
Cluster is traditionally an RTOS environment. However, adoption of richer display graphics and interconnectivity to both center stack and telemetric systems increases the demands being put on the RTOS-optimized MCUs. This means our MCUs must evolve to support many new features, including 3D graphics and high-speed interfaces. Spansion has critical IP to serve these two needs.
We are beginning to see initial market feedback indicating that 3D-heavy displays in cluster may not be as pervasive as expected. Drivers’ feedback is that a rich 3D visual environment is attractive and/or appealing, but too much 3D is a distraction. That could mean the outlook for instrument-cluster MCUs and TFTs decouple from that of other displays in the car. It’s still early, so time will tell.
Wong: Will one solution meet all of these needs?
Tehrani: No. It’s possible to build a superset solution, but it’s economically unviable. Maintaining support for proprietary processing architectures has also become unsustainable. Spansion’s strategy is to develop highly scalable and modular cluster chipset solutions around core IP such as eCT, Graphics, HyperBus, and ARM’s Cortex-R. This gives us an ideally suited platform upon which to fulfill a variety of demands and use cases. Think of Traveo, not only in terms of our automotive brand, but as a catalog or library of automotive cluster processing, graphics and memory IPs, features, and interfaces. The Traveo platform is scalable both vertically and horizontally, and with the implementation of our new HyperBus and related memories, we have really future-proofed Traveo to become the world’s most versatile cluster chipset solution.
Wong: Where does your new Traveo MCU fit within this spectrum?
Tehrani: Cars are constantly evolving and designers are looking for new ways to provide more comfort, connectivity, and driver assistance. These changes are coming more rapidly than ever, and require more complex systems with higher performance. The challenge in the past has been that ASIL-compliant microcontrollers have traditionally lacked the graphics processing and memory to reproduce video or remarkable graphics, and the large market of high-performance graphically enhanced SoCs have often been too costly in terms of price and/or certification challenges.
We at Spansion are embracing this challenge by evolving the microcontroller to support graphics. Aimed at rich human machine interfaces (HMIs) in automotive dashboards, our Traveo MCU family allows our customers to bring visually rich instrument clusters and heads-up displays to the everyday car through a cost-effective and efficient solution.
Wong: Can you give us more details about the Traveo, such as its support for the HyperBus Interface.
Tehrani: This is the first time Spansion is integrating its breakthrough HyperBus interface with its ARM Cortex-R5-based embedded Traveo MCU. By integrating HyperBus, the latest Traveo family of products gives customers design simplification and faster performance in automotive systems, enabling seamless connections with HyperBus memories, including Spansion HyperFlash memory.
The latest Traveo family delivers state-of-the-art 2D and 3D graphics, which we have optimized to bring sophisticated and automotive-specific graphics functions into the car without increased power and bill-of-materials requirements. As the first 3D-capable ARM Cortex-R5 cluster MCU, Spansion's graphics engine provides greater memory savings, increased safety features, and rich image capabilities, without the need for external video RAM. These, in turn, help manufacturers take advantage of lower overall system costs to proliferate the advanced driver experience previously reserved for luxury automotive brands.
For reference for those that don’t know, Spansion HyperBus is a low pin-count interface that achieves significantly higher performance than both legacy parallel and SPI interfaces. It enables a wide range of high-performance applications, such as automotive instrument clusters and ADAS. Spansion HyperFlash Memory devices provide a migration path—from single Quad SPI to Dual Quad SPI to HyperFlash Memory—allowing system applications to be scaled to different levels of flash performance when paired with compatible controllers. This gives OEMs the ability to offer different product models with a single design.
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Wong: What are the advantages to your approach?
Tehrani: Our Traveo family is uniquely positioned as it delivers a scalable, high-performance system at lower costs and power, and a smaller footprint. They are able to deliver advanced 2D and 3D graphics, which have been optimized to bring sophisticated and automotive-specific graphics functions into the car without increased power and BOM requirements.
In addition, the Spansion Traveo MCU family S6J3200 features 32-bit RISC microcontrollers with an ARM Cortex-R5 core, operating at 240 MHz. This means the products come with highly efficient 2D/3D graphic engines that take advantage of the lower overall system costs while meeting the increasingly high levels of performance and quality demanded by industrial, consumer, and automotive applications. In addition, the family comes with Ethernet AVB, CAN-FD, a high-speed communication protocol compatible with the conventional CAN, and SHE (Secure Hardware Extension) as a security function.
