X-Series APU Targets Microservers

May 29, 2013
AMD's “Kyoto” X-Series Opteron processor targets microservers. The APU architecture combines CPU and a Radeon GPU on the same chip.

AMD's new “Kyoto” X-Series Opteron processor will be showing up in 1P microservers. The 28 nm, quad core processors (Fig. 1) come in two flavors: the Opteron X2150 APU and the Opteron X1150 CPU. The APU architecture (see APU Blends Quad Core x86 With 384 Core GPU) blends an x86 CPU with a Radeon GPU.

Figure 1. The new “Kyoto” X-Series Opteron processor uses AMD's 28 nm technology.

The X-Series is initially available in two versions. The X2150 X-Series processor is the APU version with 64-bit, quad core Jaguar x86 CPUs with a Radeon GPU (Fig. 2). The Radeon HD 8000 GPU has 128 cores. It also provides video decode and video compression offload. The X1150 eliminates the GPU for applications that do not require that kind of processing. Both come in a 24.5 mm by 24.5 mm BGA package. The X2150 can use as little as 11W while the X1150 comes in under 9W.

Figure 2. AMD's X2150 X-Series Opteron processor is the APU version with quad core Jaguar CPUs with a Radeon GPU. The X1150 is the same chip but without the GPU.

The memory interfaces support 64-bit DDR3 with ECC. ECC is key for server applications. The interfaces operate at speeds up to 1600 Gtransfers/s and they can handle up to two SODIMM or UDIMM memory modules.

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These system-on-chip (SoC) solutions incorporate 8 lanes of PCI Express Gen 2, 8 USB 2.0 ports and 2 USB 3.0 ports, and a pair of SATA 2.x/3.x storage interfaces.

AMD took the same approach to its cores as Intel did with their new Silvermont architecture (see Intel’s Silvermont Architecture Targets Low-Power Applications). In both cases the chips run a single thread per core with out-of-order execution units. Intel's current, dual core, Centeron Atom-based S1200 that uses hyperthreading an in-order execution pipeline. The Intel S1200 Atom and AMD's Kyoto X-Series chips are available now.

The 2 Ghz X-Series chips support up to 32 Gbytes of RAM with ECC. The S1200 supports only 8 Gbytes. The X-Series also has a shared L2 cache of 2 Mbytes for all four cores compared to 1 Mbyte for the S1200 L2 cache.

The X-Series uses the same APU approach as the AMD G-series and R-series processors (see Low Power, Single-Chip APU Delivers High Performance) with a conventional GPU memory interface. Future versions may employ the unified heterogeneous Uniform Memory Access (hUMA) design approach (see Unified CPU/GPU Memory Architecture Raises The Performance Bar) that AMD has announced.

In the future, the X-Series chips will likely find a home in blade server arrays like HP's Moonshot and possibly even AMD's own SeaMicro servers (see Server Packs 768 Atom Cores To Take On The Cloud). These platforms employ hundreds of processor chips connected via a high speed fabric. Initially the chips will be used in standalone servers although their low power requirements will make them ideal for dense, low power blade servers.

The X-Series is a good mix for embedded applications as well. This is especially true for applications that can take advantage of the X2150’s GPU for computational chores. It is much more efficient

Pricing for the X1150 starts at $64 while the APU X2150 starts at $99. The X1150 will run up to 2 Ghz while the X2150 will initially top out at 1.9 GHz.

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William G. Wong | Senior Content Director - Electronic Design and Microwaves & RF

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