RISC-V ISA (Instruction Set Architecture) is an open standard with a modular structure based on multiple independent extensions, offering expanded functionality for processor optimization to address the target application. The latest SIMD/DSP extension (designated ‘P’), supports data processing and real-time needs. The RISC-V International P Extension Task Group is in the final stages of the official ratification process, which should be completed by the end of 2021. Imperas Software announced that Andes Technology, a supplier of extensible 32/64-bit RISC-V CPU cores, has certified Imperas reference models for Andes IP cores with the latest RISC-V P extension. Imperas reference models can be used to evaluate multicore design configurations in SoC architecture development.
Optimizing a multicore design is a challenging design task, and SoC architecture exploration enables full software evaluation before hardware configuration, and supports early software development, allowing the binary code to be verified without compromising the software under test with additional test code. Imperas simulation technology supports virtual platforms central to SoC design and embedded software development.
“RISC-V is more than an ISA specification, it is a framework of flexibility; the real value is in the extensions and options available for processor core implementations,” said Dr. Charlie Su, President and CTO at Andes Technology. “The RISC-V P extension within the Andes cores addresses the key real-time requirements in SIMD/DSP computations for new markets in audio/speech, IoT, tinyML and edge devices. Together with the Andes certified Imperas reference models, SoC developers can explore the next generation domain-specific solutions.”
“Embedded development depends on the optimized balance between hardware resources and software applications,” added Simon Davidmann, CEO at Imperas Software “With the Imperas golden reference models, developers can explore full software development for all the Andes cores, including the new RISC-V P extension and Andes ACE custom instructions.”
