The VantageRT 7400 series processing boards incorporate RACE++, the company's second generation interconnect architecture, in tandem with a PowePC 7400 processor. The board computes image and signal processing algorithms four times faster than earlier versions of the product.
The RACE++ architecture is used to connect multiple processors on multiple modules into a single multi-processing systems. Designed to meet low-latency, real-time data transfer requirements, each connection has a 267-MB/s bandwidth. The architecture is scalable by adding processors and crossbars, ranging up to 4.2 GB/s for a 16-module configuration.
Comments
Comments