Smart Power Blocks Build New Approach To DC-DC Conversion

As microprocessors and ASICs have migrated toward lower supply voltages and higher currents, they have forced systems designers to adopt distributed power architectures. These architectures minimize the power distribution losses associated with centralized power schemes by placing dc-dc converters as close as possible to the chip for point-of-load conversion. That proximity enables them to maintain tight voltage regulation even in the face of high di/dt requirements, which would be adversely affected by the long pc-board traces required with a centralized supply.

Although power requirements dictate that the dc-dc converter must be placed as close as possible to the processor or ASIC being powered, pc-board space in many applications is at a premium. Therefore, systems designers need dc-dc converters to be as small as possible. In other words, they require converters with the greatest power or current density possible. As a result, power-conversion efficiency becomes a critical factor to the extent that every extra percentage point of efficiency becomes important.

In recent times, designers have had a number of options for implementing their point-of-load dc-dc converters. These range from fully discrete designs that might require as many as 100 components to generate a single high-current output, to fully integrated modular solutions. With the discrete approach, current densities are typically less than 5 A/in.²

International Rectifier Corp. (IR) now offers a higher-efficiency alternative to traditional discrete and modular solutions. iPOWIR, a unique modular power architecture for dc-dc converters, raises efficiencies and reduces design complexity by integrating the design- and layout-critical semiconductors into tightly packaged, power building blocks.

The blocks are multichip module (MCM) components. They will be offered, at least initially, in small BGA-style packages. Unlike other fully integrated converter solutions, they integrate only the critical silicon. To realize the complete converter design, some external passives are required off-chip. But the company claims that this approach yields unprecedented levels of efficiency. IR boasts a potential 2% improvement in overall end efficiency when measured against comparable, industry-leading dc-dc converter solutions.

Plus, there's the inherent design flexibility that the iPOWIR architect provides. First, it allows designers to select the external passive components as needed by the application. Furthermore, iPOWIR offers scalable solutions with initial products in this series each contributing 15 A of output.

Naturally, IR's iPOWIR-based solutions require less development effort than do discrete approaches. For example, using the iPOWIR architecture, the design of a 60-A dc-dc converter is reduced to less than 50 components with fewer than 10 devices per power stage. The resulting current density is 10 A/in.²—twice that of discrete alternatives.

According to the company, in general, iPOWIR can reduce overall converter size anywhere from 15% to 44% compared to existing discrete designs. When measured against modular alternatives, iPOWIR has achieved space savings as great as 58%.

Still, there's another advantage to iPOWIR that sets it apart from other approaches, both discrete and modular. As a leading supplier of power semiconductors, IR has the first crack at the cutting-edge MOSFET technology, and power MOSFETs play a critical role in determining power conversion efficiency. Essentially, that gives the company an ongoing potential to craft industry-leading dc-dc conversion solutions.

The first product in the iPOWIR series is the iP2001, a power building block for multiphase nonisolated synchronous buck converters (Fig. 1). The iP2001 integrates a high-speed MOSFET driver with high- and low-side MOSFETs, diodes, and passives in an 11- by 11- by 3-mm BGA package. It permits development of converters with an input-voltage range of 5 to 16 V and an output-voltage range of 0.95 to 3.3 V. The device operates over switching frequencies ranging from 300 kHz to greater than 1 MHz to deliver up to 15 A per phase, depending on the selection of the external multiphase controller and passives.

The company plans to follow the iP2001 with a fully integrated PWM controller for implementation of single-phase converters. Housed in a 14- by 14- by 3-mm BGA package, this building block will generate a 0.925- to 3.3-V output at up to 15 A (Fig. 2).

Consider the effect that board layout can have on voltage regulation, when an on-board dc-dc converter is placed at a seemingly short distance from the CPU that it powers. If the trace connecting the converter output to a CPU contains 1 oz of copper in a 1- by 1-in. area, trace resistance would approximately be 0.9 mΩ and its inductance would be about 10 to 20 nH. If the application were an Intel-style microprocessor in which the di/dt were 30 A/µs, then the voltage drop due to Ldi/dt would be approximately 300 mV, which would fail Intel's VRM 9.0 voltage tolerance specification of 95 to 130 mV.

Moreover, if CPU current consumption continues rising at its present rate, we can expect as high as 120-A peak transient currents in the very near future. In that case, trace resistance alone would produce a voltage drop of 110 mV with considerable power loss. So clearly, both voltage regulation and power efficiency depend on the layout of critical components—both within and outside of the converter.

Component layout for such high-performance dc-dc converter applications is a challenging task, though. By optimizing the layout of critical semiconductor components in the MCM and by reducing the size of the overall dc-dc converter layout, the task of laying out the final circuit for the on-board dc-dc converter is greatly simplified without compromising the converter's efficiency or regulation. That makes the system designer's job considerably easier.

The second method employed to raise converter efficiency is minimization of the power losses associated with the high-side (Q1 in Figs. 1 and 2) and low-side (Q2 in Figs. 1 and 2) power MOSFETs integrated within the iPOWIR components. To achieve maximum efficiency, it's critical that the parameters associated with transistors Q1 and Q2 be optimized for their different switching conditions. So essentially, each transistor is individually tuned to minimize its losses. Simplified versions of the power-loss equations for Q1 and Q2 indicate the parameters that must be optimized in each case:

The combination of MOSFET and layout optimization can produce significant gains in efficiency. Take as an example a multiphase buck converter consisting of four iP2001 modules applied in a design that generates 1.6 V at 60 A from a 12-V input while operating at 1.1 MHz. Compared to a discrete design, which may require over 100 components, the iPOWIR solution improves the dc-dc converter's efficiency by as much as 6%. That represents almost a 25% reduction in power loss.

The iP2001 and fully integrated PWM controller are only the initial products expected to come out of the iPOWIR series. In the future, this building-block technology will be expanded to meet the requirements of both single and multioutput converters in stepdown and stepup varieties, as well as in isolated versions for datacom and telecom applications. As iPOWIR products become available, they will be supported with reference designs that recommend controllers and passive component combinations that may be used in a range of applications under various operating conditions.

In addition, the company expects to produce iPOWIR components in the present form factors with current outputs of as high as 20 and 25 A. Such high current density combined with the product's scalable nature will make iPOWIR components candidates for a wide variety of power-conversion applications.

International Rectifier Corp., 100 N. Sepulveda Blvd.,8th Floor, El Segundo, CA 90245; (310) 252-7105; www.irf.com.