Say you're designing line-driver chip sets for asynchronous digital-subscriber-line (ADSL) applications. It's not unusual to route the analog signals from the multiport analog front end (AFE) to the individual line drivers. But this creates complex analog-signal routing on the board. It also raises the specter of analog crosstalk and other issues. To sneak around this problem, designers are integrating all the AFE functionality directly into each line-driver device. This helps create an efficient, low-power design. At the same time, it eases crosstalk concerns and other worries.
In rearranging and integrating the analog and digital functions, Conexant Systems Inc. of Newport Beach, Calif., has been able to cut power-supply needs down to just one 12-V supply. Typically, designs demand four power supplies. System cost and power is saved, so designers can implement lower-cost systems.
According to the company, the design retains all of the required functionality. It's all there, from the tip-and-ring telephone-circuit interface to the universal test-and-operation physical interface for the ATM (UTOPIA) section. Conexant claims the chip set is the first octal or eight-port ADSL design to have such integration. It supports full-rate 8-Mbit/s ASDL technology and 1.5-Mbit/s G.lite ADSL data rates.
The co-integration of analog and digital functions has led to AccessRunner 9009, a two-chip DSL interface. It's a single-chip AFE and line driver housed in a 48-pin exposed thin-quad flatpack (ETQFP) that provides access to the back of the chip. Designers, then, can attach a metal slug to improve heat removal. The digital section contains DSP and controller functions. This portion is kept in a 17- by 17-mm chip-array BGA (CABGA), which is basically the same as a microBGA package. High-speed Internet-access services can be brought to market quickly by leveraging a DSL modem reference design done by Conexant. Just use it to build line cards in central-office DSL access multiplexers (DSLAMs).
