2 Gbit NOR Flash Supports Automotive Apps

Feb. 18, 2011
Spansion's 65nm MirrorBit technology NOR flash breaks 2 Gbit barrier.

Spansion 65nm GL-S NOR flash memory family

Spansion's latest 65nm MirrorBit technology cracks 2 Gbits. The NOR flash Spansion GL-S family (Fig. 1) addresses industrial (-40C to +85C) and automotive in-cabin (-40C to +105C) applications. It is available in parallel and a range of SPI devices including dual and quad SPI.

Its 98.5 Mbyte/s page-mode read performance is a 45% improvement over prior versions. This version has a 16 word page read buffer and a 256 word write buffer. It can be programmed at 1.2 Mbytes/s and has an erase speed of 655 Kbyte/s. The chips has a 15ns page access time.

The Spansion GL-S family supports sector read protection. It includes 1024 bytes of secured, OTP organized in 2 sectors.

The chips are available in a range of packages including a new 9mm by 9mm BGA. The latter is 40% smaller than the prior version but is uses the same 64-ball footprint. A 56-pin TSOP package is also available.

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