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Chipset Controls Dead Time to Reduce MOSFET Failure Risk

May 21, 2015
A new power-management chipset from Texas Instruments exploits intelligent digital control and a body-diode sensing feature that optimizes secondary-side synchronous rectification in ac-dc and isolated dc-dc power supplies.

Accurately controlling dead time in synchronous rectifiers helps minimize power loss and risk of MOSFET failure. With that in mind, Texas Instruments incorporated intelligent digital control and a body-diode sensing feature into its latest chipset to optimize secondary-side synchronous rectification in ac-dc and isolated dc-dc power supplies. The chipset comprises the UCD3138A digital controller and UCD7138 low-side gate driver.

The controller/driver combo uses body-diode voltage information with digital control algorithms to optimize dead time and compensate for power-stage component variations without calibration or screening during mass production. Intelligent sensing adjusts timing for minimal diode conduction to boost efficiency and reliability while eliminating the traditional signal-to-noise ratio channels of MOSFET VDS_ON sensing devices.

The gate driver features an asymmetrical, rail-to-rail, 4-A source and 6-A sink peak-current drive to support load range of a few hundred watts to a kilowatt (for multiple paralleled FETs). Operation maintains high efficiency at frequencies up to 2 MHz, thanks to the controller’s hardware peripherals in addition to 14-ns propagation delays and fast rise/fall teams. A 3- by 3-mm QFN package helps conserve board space.

About the Author

Iliza Sokol | Associate Content Producer

Iliza joined the Penton Media group in 2013 after graduating from the Fashion Institute of Technology with a BS in Advertising and Marketing Communications. Prior to joining the staff, she worked at NYLON Magazine and a ghostwriting firm based in New York.

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