Imec Announces Innovations at Semicon West
July 11, 2012. Imec chose Semicon West to announce breakthroughs in sub-100-nm photonics components and large-area industrial-level silicon solar cells. In addition, the organization said the Flemish government would invest in the building of a 450-mm clean room, and it announced the pending installation of a system capable of inspecting 450-nm wafers. Imec also said it entered into a joint research agreement with SK Hynix.
First, imec announced what it called the world-first realization of functional sub-100-nm photonics components with optical lithography on 300-mm silicon photonics wafer technology. Using 193-nm immersion lithography, imec achieved the lowest propagation loss ever reported in silicon wire waveguides and succeeded in patterning simpler and more efficient fiber couplers.
Imec’s industrial affiliation program on optical I/O explores the use of photonics solutions for realizing high-bandwidth I/O in high performance computing systems. The program is developing Si photonics processes, devices, and circuits using CMOS fabrication processes. Until now, many nanophotonics components have only been demonstrated using lab-scale techniques such as e-beam lithography. Imec succeeded in demonstrating functional Si nanophotonics devices on industry-compatible 300-mm wafers using 193-nm immersion lithography and 28-nm CMOS processes.
The optical waveguides on 300-mm wafers have a very low propagation loss below 1 dB/cm. Moreover, imec patterned sub-wavelength features and demonstrated optical fiber-chip couplers using 193-nm immersion lithography. By applying 193-nm immersion lithography for patterning waveguides as well as fiber couplers, imec eliminated one patterning step in the processing of photonics devices, resulting in a significant reduction of the processing cost. By demonstrating low phase errors on 450-nm arrayed waveguide gratings, imec’s patterning platform using 45-nm mask technology and 193-nm immersion lithography has proved it can yield a very uniform waveguide width within a device.
“Imec’s results are an important step in bringing Si photonics technology in line with CMOS industry standards,” said Philippe Absil, director of the optical I/O program at imec. “Our achievement with 193-nm immersion lithography and 28-nm CMOS processes on 300-mm wafers is an important step in Si photonics development to demonstrate the manufacturability of highly integrated components. Possible applications are next-generation short-reach interconnects, which we expect to go into manufacturing by 2015.”
These results were obtained in cooperation with INTEC, imec’s associated lab at the Ghent University, and with imec’s key partners in its core CMOS programs, including Globalfoundries, Intel, Micron, Panasonic, Samsung, TSMC, Elpida, SK Hynix, Fujitsu, Toshiba/Sandisk, and Sony.
Industrial-level Silicon Solar Cells Exceed 20% Efficiency
At the co-located Intersolar Show imec presented a 20.04%-efficient large-area industrial-level silicon solar cell (certification results from Fraunhofer ISE-Callab). The cell combines a high efficiency with a low-cost industrial process.
Imec’s proprietary PERC process maximizes the conversion efficiency of the cell through structure and material optimizations while maintaining cost-effective device concepts and processing. Imec’s PERC cell is compatible with the requirements of industrial photovoltaic production. It is a large-area (125×125 mm2) Cz p-type silicon cell with a simple homogeneous emitter and Ag-single screen-printed front side contacts (65-µm finger width), two bus bars, and an adapted Al back-side metallization. This processing simplicity holds the potential for cost reduction and efficiency increase in an industrial production environment. At the moment the transfer of this process to 156×156-mm² wafers is ongoing.
The cells were processed at imec’s newly completed solar cell pre-pilot line. This pre-pilot line is equipped with state-of-the-art industrial equipment for a total value of 10 million euro and is fully capable of processing 156×156-mm² solar-cell wafers. The line is operated in a flexible way with the capacity to process up to several 1,000 wafers per week.
“A simple and cost effective PERC cell is imec’s answer to short-term aspiration of the photovoltaic industry to reduce the cost per watt peak of silicon solar cells. Our PERC process combines a simple device structure with optimized processing to increase the efficiency,” said Dr. Jef Poortmans, director of photovoltaics research at imec. “We are delighted to have achieved an efficiency of more than 20% for a standard PERC cell, featuring a large-area, only a homogeneous emitter and Ag-screen-printed contacts. This shows our capability of marrying high performance to simplified processes for crystalline Si solar cells. “
Flemish Government to Support 450-mm Clean Room
Imec also said the Flemish Minister of Innovation, Ingrid Lieten, announced the government's intention to invest in the building of imec’s 450-mm clean-room facilities. With the combination of a state-of-the-art 300-mm clean room and the transition to 450-mm, imec will be able to keep on delivering its partners research on sub-10-nm devices, enabling the future growth of the global nanoelectronics industry.
The support of the Flemish Government will enable the building of the 100 million euro clean room infrastructure and help imec to further extend the investment to a total of 1 billion euro in the next five years. This further investment is needed for the installation of the 450-mm compatible tools and equipment in the new clean room. Imec is negotiating investment with the European Commission and with its global industrial partners: foundries, fabless and fablite companies, and equipment and material suppliers. The aim is to open the new 450-mm clean room facilities in 2015.
“The continuous growth of imec into a high-tech knowledge pole has only been possible thanks to the support of the Flemish government. We are therefore very thankful for the extra support of the Flemish Government for our 450-mm clean room initiative,” stated Luc Van den hove, president and CEO at imec. “It is the confirmation of the clear vision of the Flemish government on nanotechnology and microelectronics and an example of the pro-active attitude of our government in these domains. It is also an illustration of the confidence of our government in imec as a world leading R&D center in nanoelectronics and an engine of innovation in ICT, healthcare, energy, automotive [and so on], contributing to a more sustainable society.”
“Powerful and cheap ICs are the core of next-generation mass consumer electronics, such as game consoles, smart phones, [and] tablets,” stated Lieten. “But they are also essential to provide solutions for the challenges our society is facing, such as the ageing of the population and climate change. Imec is a world-leading research center in nanoelectronics, and we want to secure this position for the future. The Flemish government therefore supports imec to switch, together with the industry, towards 450-mm wafers, and to continue its groundbreaking research with applications in healthcare and sustainable energy. With this investment, we also enable imec to attract international top researchers in nanoelectronics, and this will translate to more societal breakthroughs.”
Meanwhile, imec has already set up collaborations on the 450-mm transition with leading equipment suppliers. The first 450-mm-capable wafer-defect inspection system from KLA-Tencor, Surfscan SP3 450, will be installed at imec. Collaborations with leading equipment suppliers, such as this one with KLA-Tencor, are crucial for successful implementation of 450-mm in R&D, leading to fab integration, imec reported. “This tool will be essential to detect ultra-small defects, which have a substantial impact on yield when scaling to the sub-10nm technology nodes,” said Van den hove.
Imec and SK Hynix Sign Joint Research Agreement
Finally, SK Hynix Inc., a memory semiconductor supplier, and imec announced that they have extended their research collaboration for three additional years. SK Hynix will participate in imec’s complete R&D program on advanced CMOS scaling for memory and logic.
Since 2007, SK Hynix has been a strategic partner in imec’s joint research platforms on advanced lithography, addressing immersion and EUV lithography challenges, and on next-generation non-volatile memory processes. As a key partner in imec’s core CMOS R&D program, SK Hynix will begin a new phase of collaboration, gaining early insight to breakthrough research and fundamental understanding in each research area of imec’s core CMOS R&D program. Both partners will continue to collaborate on advanced lithography and advanced memory, and SK Hynix will also join imec’s research platforms on logic devices, advanced interconnects and 3D system integration. SK Hynix designers will be able to leverage early technology insight to make informed choices for product roadmaps and high-bandwidth optical interconnects for future systems.
“SK Hynix has highly recognized imec’s technology leadership in this industry. We expect this extended collaboration including Logic, Interconnect and 3D area with imec to be a cornerstone to enable us to strengthen our research competence for the next generation technology,” said Sungjoo Hong, senior vice president and head of R&D at SK Hynix.
“We are excited that SK Hynix has joined our research platform as a full core partner. It is a confirmation of our fruitful collaboration during the past five years, and proof of the value imec offers the semiconductor industry,” said Van den hove. “Collaborative path finding R&D based on a sharing of cost, risk, talent and IP, and cross fertilization between logic and memory companies, has become indispensable to overcoming the formidable challenges facing our industry. SK Hynix’s valuable know-how in memory scaling has been, and will continue to be, an important asset for imec’s global research platform.”