Memory maker talks Automata, suggests DRAM replacement

Santa Clara, CA. Memory maker Micron Technology is addressing processing, as described by Thomas Pawlowski, Micron chief technologist/fellow, at a DesignCon keynote address January 30. The company's Automata Processor (AP), he said, is massively parallel and great for unstructured problems. The company is also preparing for new memory architectures, he said, in an effort to help designers cope with the technology-scaling challenges that are exposing the designers to new hazards.

Pawlowski noted that memory has typically been seen as the “slug” of a system, forming a “memory wall” that limits performance. Now, he says, there's a “processor wall,” which the AP addresses.

“Automata,” he said, “is not your traditional processor. It has no ALU and no op codes. It is a symbol processor that lets you packetize bits any way you want.”

Pawlowski described the AP as a “nondeterministic state machine in silicon. Nondeterminism is often a bad thing, but not in finite state machines.” He added that any nondeterministic machine can be modeled as deterministic one at the expense of exponential growth in state count. In fact, he said, Micron takes advantage of both a nondeterministic finite automaton (NFA) and deterministic finite automaton (DFA).

He said the AP is Turing complete, although that was not a priority in its design. Nevertheless, AP runs Conway's Game of Life, which is a Turing-complete problem that the AP can run.

AP, Pawlowski said, can solve NP-complete and NP-hard problems, enabling it to address many real world applications, including video image analytics, data analytics and mining, bioinformatics, medical diagnostics, and social networking. Initial applications, he said, include network security, computational biology, and high-performance computing.

Pawlowski said Micron is introducing the AP as an accelerator. He described a two-dimensional plane in which processors might be pictured, with the vertical axis representing parallelism and the horizontal axis representing structure (with unstructured implementations on the left).

Micron's AP, he said, is unstructured and highly parallel, fitting within the upper left quadrant.

Traditional CPUs, he said, are good for bottom right quadrant—they are structured but not highly parallel, and they are very poor for the upper-left quadrant within which the AP fits. As for GPUs—they occupy the top-right quadrant, where they excel in solving “embarrassingly parallel problems.”

“The Micron AP, he said, “is targeted where everything else is weakest: in the top left quadrant, representing extraordinary parallelism but in an unstructured format.” He cited as an example a strand of DNA, which is made up of a vocabulary of only four symbols but can have nearly endless length—the AP could help locate common genome sequences in noisy data.

He noted that AP reduces power and compute time compared with traditional CPUs. “We gracefully and less than linearly increase our execution time for NP-hard problems,” he said.

Pawlowski said Micron currently has silicon in debug and a PCIe development board with 48 APs. He added that the company is about to release version 1.4 of its software development kit. The company expects to begin sampling the AP in the middle of this year. More information is available here.

After providing details on the AP, Pawlowski addressed memory. “Memory is increasing and growing as a percentage of silicon area in systems,” he said, adding, “We feel responsible for improving that silicon as fast as we can.” He explored ways to do that. “One goal, he said, “is memory abstraction—hide the unnecessary details and exploit the freedom.”

He asked rhetorically, “Do you buy DRAMs because you love refreshing them?” Of course not—you buy them because you need to store data.” An alternative to traditional DRAM, he said, would provide abstraction to enable necessary degrees of freedom for bit management and yield management for performance and cost, with an example being Micron's Hybrid Memory Cube: “It exposes nothing—offering a SerDes interface and simple command set. The details,” he told DesignCon attendees, “are not your problem. In the future, no memory should be directly controlled. Memory abstraction is really a necessity.”

He concluded, “No technologies just go away—they are displaced when new technology is superior. The window to replace DRAM opens in 2015.”