Understanding SFP+ Transceiver Testing

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As SFP+ (enhanced small form-factor pluggable) becomes more pervasive, engineers need to become familiar with some of the key challenges linked to testing SFP+ capable devices. This article will first discuss the key features of SFP+ and walk through the testing challenges. It then will delve into the critical transmitter waveform distortion penalty for copper (TWDPc) measurement tied to SFP+ verification and its unique physical-layer (PHY) testing challenges. The reader will receive guidance on test offerings, fixturing, and connectivity, gaining an overview of compliance and debug test of this important technology.

SFP+ Background

SFP+ is a next-generation, hot-pluggable, small-footprint, serial-to-serial, multi-rate optical transceiver for 8.5GbE to 11GbE data communications and storage-area network (SAN) applications. The SFF-8431 SFP+ standard specifies a simplified transceiver module compared to its 10GbE predecessor, effectively replacing two optical modules and a connectorized optical fiber with a twin-axial copper-cable assembly. With recent commercial availability, SFP+ transceivers are currently shipping more than three times the number of ports shipped by its predecessor technology, 10GBASE-T, and that gap is increasing month over month.

Smaller, Cheaper, More Efficient

The SFP+ module is a variant of the SFP optical transceiver. The SFP+ module form factor is 30% smaller, uses less power, requires fewer components, and is less expensive than the 10-Gigabit small form-factor pluggable module (XFP) form factor, which was already smaller and used less power than the XAUI-based XENPAK and X2 form factors.

The SFP+ form factor significantly simplifies the functionality of the 10G optical module by moving such functions as clock and data recovery (CDR), electronic dispersion compensation (EDC), 10G SERDES, and signal conditioning that traditionally resided inside the XAUI-based modules into 10GbE PHY devices and line cards. As a result, the modules are smaller, consume less power, and allow increased port density while being less expensive than XFP. Some products on the market now offer 48 ports or more in a rack.

Each SFP+ module houses an optical transmitter and receiver. One end of the module is an SERDES framer interface (SFI) serial interconnect, which handles differential signals up to 10 Gbits/s. The other end is an optical connection that complies with the 10GbE and 8GFC standards. The SFP+ active cable has electrical input and outputs with an optical transmitter and receiver internal to the cable. Active cables with SFP+ terminations also can be copper-based with integrated pre-emphasis and equalization.

SFP+ Testing Challenges

While SFP+ helps to reduce overall system cost, it puts new burdens on the PHY’s design and performance. The SFI between the host board and the SFP+ module presents significant design and test challenges.

One obvious challenge is the increased port density and the testing time required with 48 or more ports per rack. For instance, there are 15 measurements each for the host transmitter tests, and each of those measurements using manual methods can easily take from three to five minutes. This means a test engineer will take more than an hour per port to complete the required tests, multiplied across the number of ports.

Another challenge is moving seamlessly from a compliance environment to a debug environment. If a measurement fails, how can the designer determine which component is causing the failure and debug the issue to arrive at the root cause? Such determinations are especially challenging given the tight physical packaging and compact designs.

Yet another problem that most designers face today relates to connectivity: how to get the signal out from the device under test (DUT) to an oscilloscope. Test fixtures are typically required but questions arise around whether the fixtures have been tested and validated against the specification.

The SFF-8431 SFP+ specification was written with the perspective that most design and test engineers use equivalent-time oscilloscopes. In reality, most designers prefer to use real-time oscilloscopes because it helps them to get into debug mode more easily. Also with oscilloscopes supporting bandwidths of more than 30 GHz with fast sampling rates, rise time and bandwidth is much less of a constraint than it was just a few years ago. However, the challenge is to interpret the specification in the context of a real-time oscilloscope compared to an equivalent-time model.

Another challenge to prepare for is that the SFP+ specification calls out some measurements to be performed using a PRBS31 signal. Some measurements (total jitter and eye-mask hit ratio) have PRBS31 as a recommended pattern. The maximum record length possible for acquisition with popular high-performance real-time oscilloscopes is 200 million samples. At a sampling rate of 50 Gsamples/s, the designer can acquire around 40 million unit intervals (UIs). At a sampling rate of 100 Gsamples/s, the instrument can acquire 20 million UIs. However, a PRBS31 pattern has more than 2 billion UIs. Hence, acquiring an entire pattern presents a challenge.

Additionally, acquiring a record length of 200 million data points demands huge processing power and time. One solution is to treat the PRBS31 waveform as an arbitrary waveform and acquire a modest record length of 2 million to 10 million UIs to recover the clock and compute the results. This provides a good tradeoff between processing power and test-result accuracy.

TWDPc Measurements

Because it provides a great amount of detail about the health of an SFP+ design, test engineers must master the TWDPc measurement. TWDPC requires a special algorithm, which the SFP+ specification defines.

This test is defined as a measure of the deterministic dispersion penalty due to a particular transmitter with reference to the emulated multi-mode fibers and a well-characterized receiver. The fiber-optics concept has been extended to quantify the channel performance of high-speed copper links, also known as “10GSFP+Cu.”

The TWDPc script (of 802.3aq, 10GBASE-LRM) processes a PRBS9 pattern requiring at least 16 samples per unit interval. Out of concern for the large installed base of equivalent-time oscilloscopes with a record length of around 4000 samples, the requirement for 16 samples per unit interval was relaxed to seven samples per unit interval.

The relaxation of the requirement from 16 samples per unit interval to just seven samples per unit interval causes worst-case pessimism of 0.24 dB TWDPc over 30 measurements. For DUTs that already have a high TWDPc, 0.24 dB can be the difference between a pass or a fail result.

The TWDPc measurement for SFP+ host transmitter output specifications for copper requires more than 70 Gsamples/s to capture a minimum of seven samples per UI. Real-time oscilloscopes offering higher sampling rates of 100 Gsamples/s or greater have a much higher chance of providing accurate results for TWDPc compared to scopes that only offer lower sampling-rate options.

Across the board, it is important to map the SFP+ signal’s data-transfer rate to the proper oscilloscope bandwidth requirements to ensure accuracy in measurement and margin testing. With a 10.3125-Gbyte/s data-transfer rate and minimum rise time of 34 ps, a scope with a bandwidth of 16 GHz or higher is required to meet the minimum requirements for SFP+. As noted, for the TWDPc measurement, sampling rate is also an important consideration.

Additional Measurements

SFP+ defines 15 measurements categorized under three different subheadings: host transmitter output electrical specifications, host transmitter jitter and eye-mask specification, and host transmitter output specification for copper. Table 1 provides a good at-a-glance reference.

While there are more than 10 measurements under the module transmitter, Table 2 covers the 10 most important measurements. They are sub-categorized under two sections: module transmitter input electrical specifications and module transmitter jitter and eye-mask specifications.

Test Automation

To overcome the test challenges and provide a shorter time to answer, test and measurement equipment manufacturers have developed solutions that can run through all SFP+ measurements quickly, generate reports, and allow access to a debug mode if the testing requires it.

Using such a solution, design or test engineers can select all measurements and press a run button to execute all the required measurements. Executing the set of 15 host measurements can take as little as 15 minutes instead of hours. The software also enables engineers to look deeper into root-cause analysis without moving to a different instrument. Support for TWDPc helps to eliminate the need to design custom software to complete this complex and time-consuming measurement.

Automated software also helps meet compliance needs for SFF-8431 revision 4.1, which requires measurements on different signal types like 8180, PRBS9, and PRBS31. Even though the standard states that a few measurements, such as uncorrelated jitter and total jitter, should be performed on PRBS31 signals, it also provides the flexibility to use a PRBS9 signal instead of a PRBS31 signal. It is therefore important that the software additionally gives users an option to select these different signal types.

It is also important to have summary reports available, usually in .mht format, which is essentially an HTML format. The report should incorporate full measurement results including test-configuration details, waveforms, and plots. Also valuable are test-setup details such as calibration status, oscilloscope model, probe mode, software version, and execution time. These details help to ensure that tests are consistent and repeatable.

Host Compliance Test Fixtures

SFF-8431 mandates the use of fixtures to ensure consistent results and measurement system connectivity. Fixtures come with a dc block because the specification mandates that a few measurements are to be performed using dc blocks (Fig. 1). One challenge has been unlocking the fixture from the DUT, because there has been risk of damaging the fixture. In such cases, a special unlocking mechanism is helpful.

1. Two variants of the host compliance board are available, one with dc blocks and terminations and one without.

The host compliance board is the most widely used fixture. Two variants of this fixture are available: one with a dc block and terminator and another one without them. A fixture with a dc block is typically preferred while performing the measurements as suggested in the specification. Similar to the host compliance board, the module compliance board also has two variants: one with a dc block and terminator and another one without them.

Receiver Testing

Unlike transmitter testing, where the designer must ensure that the input signal is of sufficient quality, receiver testing involves sending in a signal that is of poor enough quality. To do this, we create a stressed eye representing the worst-case signal. We then calibrate this optical signal using jitter and optical power measurements.

Additionally, the electrical output of the receiver should be tested using three basic categories of tests. These include a mask test to ensure a large-enough eye opening, a jitter-budget test that tests for the amount of certain types of jitter, and jitter tracking and tolerance to determine the ability of the internal clock-recovery circuit to track jitter within its loop bandwidth.

SFP+ Transmitter Testing

A typical test configuration involves the DUT and source for generating the required signal impairments (Fig. 2). With Tektronix oscilloscopes, the SFP-TX solution provides a pull-down menu to select measurements for SFF-8431 SFP+ testing (Fig. 3). It permits automatic configuration of masks, limits, and measurement parameters. It also provides the ability to change selected measurements and measurement configurations.

2. This diagram illustrates a typical SFP+ test-setup configuration.

3. The SFP-TXC user interface allows the user to set up and run tests by selecting from menu options.

Once the test bench is set up and the DUT is properly connected, the user clicks the run button to perform the selected test suite. The SFP-TX solution prompts the end user to put the DUT into different test modes by popping messages at regular intervals.

At the conclusion of the test cycle, the instrument generates a summary report in .mht (MHTML) format with pass/fail status. The report includes test configuration details, waveform plots, and margin analysis to provide additional design insight (Fig. 4).

4. A SFP+ host test report in MHTML format includes test-configuration details, waveform plots, and margin analysis.

Summary

While SFP+ significantly simplifies the functionality of the 10G optical module, it introduces a number of new test and measurement challenges. The increased port density afforded by SFP+ drives the need for automation to speed the test of 48 or more ports per rack. Other challenges include the need to move seamlessly from compliance testing to debug testing, the need for specialized test fixtures, and the use of real-time oscilloscopes compared to equivalent-time oscilloscopes.

One of the most important tests for SFP+ is TWDPc. This test is defined as the difference (in dB) between a reference signal and noise ratio (SNR) and the equivalent SNR at the slicer input of a reference equalizer receiver for the measurement waveform after propagating through a stimulus channel. Measuring TWDPc involves capturing a transmitter waveform and processing it using code to calculate the penalty of that waveform on a reference equalizer. It is a required measurement for SFP+ compliance testing, and setting up this measurement can be daunting without proper tools and guidance.

A testing approach that automates much of the setup for repetitive tests involved with module testing and analysis can significantly reduce the challenges of SFP+ compliance and debug. Eye pattern masks, limits, and measurement parameters can be automatically configured while the user can change selected measurements and measurement configurations. Software with this capability can be used in conjunction with PHY test equipment including oscilloscopes and specialized fixtures for device silicon validation, cable and connector validations, and compliance and debug as well as manufacturing test.