Microchip's PIC10F32X (Fig. 1) represents a major step forward for microcontrollers. It includes a number of neat new features but one that stands out is the Configurable Logic Cell (CLC). I interviewed Fanie Duvenhage, Director of Product Marketing at Microchip, at Boston ESC 2011 about the PIC10F32X and these new features (watch the Improving Micro-Controller Integration with Microchip video on Engineering TV).

The idea of incorporating programmable logic into a microcontroller is not new. Cypress Semiconductor's PSoC line has a much more advanced form of programmable logic. It includes configurable digital and analog blocks. Intels' E600C system-on-chip line packs a 40nm Altera Arria II FPGA with an Atom processor (see Configurable Platform Blends FPGA With Atom).

Of course, the PIC10F32X tends to be in a different class. It does not do the heavy lifting of an Atom-based solution or even handle the complexity of a full configurable peripheral system like the PSoC. Instead the Microchip platform address low end control systems including motor control. It is likely to be found in applications from whitegoods control to automotive applications.

The CLC (Fig. 2) is essentially a basic PLD (programmable logic device). It can be connected to a range of inputs including most on-chip devices and it can drive many of these as well as output pins. It effectively replaces any glue logic and provides simple, real time feedback at logic speeds rather than programmatic speeds. This is critical since these are 8-bit micros.

There are up to four CLC blocks so large, complex algorithms will not be placed into these logic blocks but there is sufficient support for some very useful functions. Keep in mind that this family of chips comes in 6- and 8-pin packages and two of those are for power. Having larger amounts of configurability on-chip would be a waste. Any system requiring more would probably be better served by a large PLD or a small FPGA.

LC The free CLC Configuration Tool is a standalone GUI for setting up the CLC blocks. It provides basis simulation and generates C code for incorporation into an application. The CLC configuration can be changed programatically but most applications will be "set and forget."

The chip family is designed for compact, low power applications. It draws under 20 nA in sleep mode. The chips have an on-board 16 MHz oscillator with the system utilizing 30 µA/MHz in active mode. There is a 3-channel, 8-bit ADC with an integrated temperature-indicator module and up to four PWMs. The chips have up to 512 words of flash memory and 64 bytes of RAM with an 8-level program stack.

The PWMs can be combined with the Complementary Waveform Generator (CWG). The CWG (Fig. 3) generates complementary pulses with adjustable shifts in the rising and falling edges. This is handy in applications like motor control where an H-bridge is used and turning on both sides of the bridge at the same time is a very bad idea. The CWG is similar to the CLC in that it can take inputs from a number of sources, not just the PWM, and can drive different outputs.

The final new feature is the Numerically Controlled Oscillator (NCO). The NCO (Fig. 4) is a common device but one that is rarely found in low end platforms. It provides a way to do things lke vary pulse width within a constant frequency output. The NCO can be linked to the other new modules.

The chips can be found on the $134 PICDEM Lab Development Kit. There are $39 F1 Evaluation Platforms as well.

The latest chips are supported by the new MPLAB X based on NetBeans (see NetBeans Powers New PIC IDE). Microchip's debugging tools like the MPLAB ICD 3 handle the new chips.

The chips are available in 6-pin SOT-23 packages as well as 8-pin PDIP and 2 mm by 3 mm DFN packages. Pricing starts at $0.37. The standard part requires 1.8V to 3.6V with a 5V version using from 2.3V to 5.5V. Overall, Microchip has packed a lot of logic into a small package. I'm looking forward to checking these out.