• Resources
  • Directory
  • Webinars
  • CAD Models
  • Video
  • Blogs
  • Advertise
    • Collaborating Oncomputer 6168342b62fd2
    1. Technologies
    2. Embedded

    Techniques to Minimize Code Footprint in RISC-V-Based Apps (Download)

    Oct. 14, 2021

    Read this article online.

    The RV32I is the base instruction set that can get the standard extensions listed in Figure 1, such as:

    • M (Integer Multiplication)
    • A (Atomic Instructions)
    • F (Single Floating Point)
    • D (Double Floating Point)
    • C (Compressed Instructions)
    • B (Bit Manipulations)
    • and so on….
    1. These are the standard extensions for the RISC-V ISA. (Courtesy of Wikipedia - https://en.wikipedia.org/wiki/RISC-V)
    1. These are the standard extensions for the RISC-V ISA. (Courtesy of Wikipedia - https://en.wikipedia.org/wiki/RISC-V)
    Download

    Comments

    To join the conversation, and become an exclusive member of Electronic Design, create an account today!