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Chip Packaging
Chip Packaging
This TechXchange examines chip packaging technology including new advances such as chiplets.
Chip Packaging
Digital
Edition
Archives
EDA
Through the Substrate Looking Glass
Oct. 19, 2023
Intel is looking to use glass, which has strong thermal and mechanical characteristics, as a substrate for chiplets.
Embedded
Chip Packaging Part 1 - Traditional Packaging Technology
Feb. 19, 2021
Dr. Navid Asadi’s group provides an introduction to conventional chip packaging methods
Embedded
Chip Packaging Part 2 - Introduction to IC Packaging
Feb. 13, 2021
Dr. Navid Asadi’s group delves into chip packaging methods including system-in-package (SIP)
Embedded
Chip Packaging Part 3 - Silicon Interposer
Feb. 12, 2021
Dr. Navid Asadi’s group examines how silicon interposers are changing chip packaging
Embedded
Chip Packaging Part 4 - 2.5D and 3D Packaging
Feb. 11, 2021
Dr. Navid Asadi’s group examines 2.5D and 3D packaging for expanding capabilities and capacities of chip solutions
More content from Chip Packaging
Embedded
Chip Packaging Part 5 - Chip Production and Manufacturing
Feb. 8, 2021
Dr. Navid Asadi’s group examines chip package production
Embedded
Chip Packaging Part 6 - Wafer to Panel Level Packaging
Feb. 4, 2021
Dr. Navid Asadi’s group delves into wafer scale and panel level chip packaging.
Embedded
Packaging: A 30-Year Career Retrospective
Nov. 4, 2013
We’ve come a very long way from the first IC, but we still have a long way yet to go to achieve the full promise of the IC revolution.
Digital ICs
Advanced Packaging Delivers Capacity And Performance
June 20, 2013
High-density BGAs and 3D stacking increase compute and storage density.