The Fundamentals Of Flash Memory Storage

Flash memory is ubiquitous, especially in mobile devices. Available in a wide range of form factors, it continues to push hard-disk drives from more and more platforms as its costs go down and capacities and operational lifetimes go up (Fig. 1).

1. Flash memory comes in a range of form factors, including SecureDigital (a), MicroSD (b), Sony Memory Stick (c), Compact Flash (d), and mSATA (e). They typically employ NAND flash storage.

NAND and NOR flash memory dominate the solid-state nonvolatile memory (NVM) arena, but they aren’t the only technologies that are available. Form factors that don’t expose flash memory explicitly are possible targets for replacement with non-flash technologies. For example, non-flash products are cropping up in serial storage.

Table of Contents

NonVolatile Solid Storage
At one end of the spectrum are one-time programmable (OTP) memories. These days, OTP memory is normally used for storing security keys or network IDs. It is implemented using a range of technologies such as fuse, antifuse, and floating gates. It also can be implemented using standard CMOS technologies.

Moving up the NVM scale are a number of multi-time programmable (MTP) memory technologies that can write hundreds or thousands of times (see “Kilopass Delivers OTP And MTP Memory”). MTP memories often are used to implement boot code that rarely changes. Like OTP, MTP is usually implemented using CMOS technologies, allowing it to be included with digital logic.

Floating-gate EEPROM has been commonly used for data storage. Its ability to write a single byte plus its good endurance and data retention properties have made it popular, but flash technologies outclassed it in density. EEPROM emulation often is called a feature of some flash implementations that hide flash’s block erase requirements so an individual byte can be written.

Other nonvolatile technologies keep bumping the edges of flash dominance, including magnetoresistive RAM (MRAM), ferroelectric RAM (FRAM), phase change memory (PCM), and up and coming NVM technologies (see “Magnetic Cores To MRAM: Nonvolatile Tipping Point?”). These technologies have better overall performance figures than other NVM technologies including NAND and NOR flash, including write speed, voltage requirements, lack of a page erase cycle, long-term endurance, data retention, and scalability.

These technologies started targeting niche markets where their higher costs, at least initially, weren’t as much of an issue and their advantages were significant. They’re even giving SRAM and DRAM a run for their money.

The Texas Instruments 16-bit MSP430FR57xx family only boasts up to 16 kbytes of FRAM for data storage and program storage. The family typically has a mix of SRAM, flash, and EEPROM storage. A single approach reduces the number of stock keeping units (SKUs) and simplifies developers’ jobs since they no longer need to juggle RAM requirements with program storage.

These alternative NVM technologies will be found in more designs in the future. But for now, flash memory is the dominant NVM technology.

Flash Technologies
Flash memory implementations are divided into NAND and NOR implementations with a host of variations from different vendors. In general, they employ a floating-gate transistor. The two approaches indicate how the transistors are connected and used rather than incorporating the transistors as part of digital logic as with an FPGA or custom logic.

NOR flash transistors are connected to ground and a bit line, enabling individual bits to be accessed. It provides better write endurance than NAND flash. NOR flash is typically used where code and data may exist. Microcontrollers with on-chip flash normally incorporate NOR flash.

NAND flash transistors are generally connected in groups to a word line. This allows a higher density than NOR flash. NAND flash is typically used for block-oriented data storage. NAND flash can be less reliable than NOR from a transistor standpoint, so error detection and correction hardware or software is part of NAND storage platforms. NAND is typically used for high-capacity data storage.

Flash memory uses an erase-write cycle. The erase essentially sets the memory to all 1s. Writing sets bits to 0, and it’s possible to write different data as long as existing 1s are changed to 0s. Flash file systems can take advantage of this feature because it permits operations to be performed without a long and electrically expensive erase cycle. NAND flash always works at the block level, while NOR normally has a finer grain access.

Flash memory started with single-level cell (SLC) data encoding where each storage transistor encoded a 1 or a 0. Multi-level cell (MLC) flash normally refers to the ability to store 2 bits of information per cell instead of one. Everything is analog at the transistor level, but it’s simpler to build a two-level detection circuit than it is to build a four-level detection circuit required for MLC flash.

Likewise, programming an MLC cell requires the ability to generate four distinct levels. Triple-level cell (TLC) flash takes this a step further, packing 3 bits or eight levels into a single storage cell like Micron’s 3-bit, 34-nm NAND flash memory chip (Fig. 2).

2. Micron’s triple-level cell (TLC) flash memory stores 3 bits of data in each transistor.

The obvious advantage to MLC or TLC storage is higher densities. The tradeoff is usually in performance, especially in terms of endurance.

The typical SLC NAND flash has a write endurance on the order of 100k cycles, while SLC NOR flash is on the order of 1M cycles. MLC flash cuts this by a factor of 10, and TLC cuts it even further. Technology continues to improve these numbers. SLC has better write endurance, while MLC and TLC will be more cost efficient.

Flash system lifetime depends on a number of factors, including how it’s managed. Unmanaged flash storage has a problem if one area wears out, which occurs when a write fails to store the proper information. Error detection systems can help determine when this happens, but once it does the device is usually worthless. Worse, its failure could cause significant problems. This is why devices such as microcontrollers with built-in flash storage that do not track wear rely on NOR flash with its higher write endurance characteristics.

Several techniques can be used to improve the overall system lifetime, such as wear leveling. This approach requires the ability to remap the location of information. It works best with a block-oriented device, although it could be applied with a block size of a single word. There is overhead to implement wear leveling so large block sizes will be more efficient.

Wear leveling distributes writes across the storage device. The system’s lifetime then can be viewed as the system’s total write capacity rather than the maximum for a single block. Wear leveling requires the ability to track block write usage and to record and utilize this information. Defects often can reduce a block’s lifetime to less than its recommended write lifetime.

In this case, the remapping mechanism can be used if the memory is over-provisioned. Extra blocks or sectors are common on hard-disk drives, and the same technique applies to flash memory. The only difference is that an extra block will be used if an uncorrectable error is detected in a regular block.

If wear leveling is used, then typically all blocks are part of a pool. If the system is implemented in software, it may also be possible to select the logical device size based on the desired lifetime of the system. A smaller logical size provides more “extra” blocks.

Other technologies like FRAM, MRAM, and PCM don’t suffer from the same write endurance issues as flash. But techniques such as memory over-provisioning and remapping may still apply, especially in larger devices where other errors such as hardware defects may be common.

Flash Software And Controllers
Controlled access to flash memory allows software to ignore many of the challenges of supporting flash from erase requirements to write endurance. Where and how this control is implemented varies greatly.

Software flash file systems are one way developers deal with raw flash. These systems are device drivers that have access to the flash chip interface. The driver handles all the flash chores like error detection, wear leveling, and bad block remapping transparently with respect to the operating system and applications. It may utilize part of the flash storage for internal tables, and it may account for flash erase and write characteristics.

The drive may provide some level of file and directory management, or it may simply present a logical, low-level block device. There are advantages to both approaches, and the choice depends upon the application environment.

A block level interface is normally provided if a hardware approach is taken. A hardware implementation can also incorporate a more robust error correction and mapping system because of hardware acceleration that would normally be unavailable to a software implementation. Initially, there were many flash controller companies, but they have been snapped up by flash memory companies looking to provide a more integrated solution.

Placing the flash memory behind a hardware controller does a number of things. For example, it can simplify the device interface, provide more advanced features such as power reduction, including various sleep modes, and implement hybrid memory systems.

Hybrid systems mix memory types in the same package. This approach allows block devices like NAND flash to be addressed at a byte or word level by adding RAM to the mix. Samsung’s OneNAND mixes SRAM with its NAND flash controller (see “The Storage Hierarchy Gets More Complex”). This allows the system to be used as program storage with blocks being cached in the SRAM as required.

RAM is also faster than flash, especially for writes. It doesn’t suffer from flash’s write endurance limitations either. And, RAM isn’t restricted to block access. A hybrid system can provide many of the advantages of flash as well as those of RAM when it’s used as a general cached system. Data is flushed from RAM to flash as necessary since there is usually more flash memory than RAM in these kinds of designs.

Hybrid systems can get even more complex as demonstrated by Seagate’s Momentus XT hard drive (see “Seagate Delivers 2nd Generation Hybrid Hard Drive”). This storage system mixes three types of storage: DRAM, SLC flash, and rotating magnetic storage. It has a SATA interface, so there’s a SATA controller in addition to controllers for the flash and hard-disk drive. This is completely transparent to users.

The use of hardware controllers for flash memory also enables designers to add other functions such as security and encryption to the mix. Hardware acceleration benefits these types of features as well.

Standardizing the flash interface would definitely make a system designer’s job easier. The Open NAND Flash Interface (ONFI) Working Group has been doing this type of work, releasing the OFNI 3.0 specification in 2011. The spec is designed to deliver 400 Mtransfers/s with double data rate (DDR) transfers. Its Toggle Mode 2.0 optionally employs differential signaling. OFNI additionally specifies chip-level form factors, but flash storage covers a very wide range of form factors.

Flash Form Factors
Form factors for small serial flash devices vary widely. There are three-pin devices that support the 1Wire protocol as well as a wide range of devices that support I²C and SPI. Quad SPI (QSPI) NVM devices increase the number of bits transferred by a factor of four, and there are even microcontrollers that can execute programs directly from QSPI serial memory devices like NXP’s LPC1800 family (see “Cortex M3 Can Run From Quad SPI Flash”).

Storing programs in serial flash is not uncommon. Most PCs have their BIOS stored in serial flash memory. The chip boot loader copies this program into RAM where it is executed. NXP’s LPC1800 reads the memory an instruction at a time.

Serial memories were one of the first places were other technologies like FRAM and MRAM were used. Serial memories often contain other subsystems such as temperature sensors and real-time clocks (RTCs). Some RTCs even utilize the memory for storing time-stamp information.

JEDEC e-MMC (embedded multimedia card) form-factor chips like San-Disk’s iNAND use the same serial interface as the removable, seven-pin MMC form factor (Fig. 3). The advantage for developers lies in having the same interface for fixed and removable storage.

3. SanDisk’s iNand implements JEDEC’s e-MMC interface.

The seven-pin MMC device fits into the same slot as nine-pin SD and nine-pin SDIO devices, so I/O devices can reside on the card. The SD has the same pinout as MMC with two extra pins added near the outside edges. The MMC interface is essentially SPI with SD being QSPI. The 11-pin miniSD and eight-pin microSD cards use the same type of interface but in a smaller package. The transfer rate of these serial devices is 832 Mbits/s.

Removable flash storage shows up with USB, SATA, and SAS interfaces as well. SAS tends to be used only on drives, while SATA is found on disk-drive form-factor flash drives as well as embedded devices like Viking Technology’s SATA Cube 3 (Fig. 4). The SATA Cube 3 is a stack of circuit boards with flash memory and a controller. More boards mean more storage.

4. Viking Technology’s SATA Cube 3 has a SATA interface that provides access to flash chips stacked on multiple circuit boards.

On-board SATA devices also include standards such as mSATA and Slim SATA modules. SATA interfaces provide significantly higher throughput compared to SPI/QSPI used with media like SD cards. Larger SATA flash storage can be found in 1.8-, 2.5-, and 3.5-in. hard-drive form factors.

IDE-based Compact Flash storage is still a common feature on many embedded motherboards. This has been changing as microcontrollers have moved from IDE and PCI to SATA and PCI Express. Still, Compact Flash is found in many mobile devices like digital camcorders, although cameras tend to utilize SD-style cards.

USB flash drives have effectively replaced CDs, DVDs, and floppy disks. The first USB 1.x flash drives were tiny in capacity compared to today’s average size. These days the top-end platforms are massive and run USB 3.0 (see “USB 3.0: A Tale Of Two Busses”).

Capacity and speed aren’t the only things that have been changing with USB flash drives. Additional functionality, especially in security, is more common. For example, Apricorn’s Aegis Secure Key has a built-in keyboard for entering a security code, preventing key-logging viruses from capturing the code (Fig. 5). It works with any operating system.

5. Apricorn’s Aegis Secure Key lets users enter the digital key via a keypad rather than the host’s keyboard.

Most other security-related solutions use a device driver or application that runs on the host and uses the host for entering any decode key. The Aegis Secure Key has an admin and user password. These features are used to decode a key that encrypts and decrypts data stored in the flash memory.

USB flash drives are normally used for portability, but they have also found a home inside embedded devices. Many motherboards have an internal Type A connector. Most motherboards only have Type A connectors on the back panel. Some devices like Eurotech’s Helios Edge Controller only have USB interfaces for flash storage and peripheral interfaces (see “Hands-On Eval Of Eurotech’s Helios Edge Controller”).

USB headers are also common on motherboards. They’re used for additional external USB interfaces via cables and backplane connections. They can also be used for USB storage devices like those from Swissbit (Fig. 6). The Swissbit USB Flash Module plugs into standard nine-pin USB headers found on most motherboards. The mounting hole isn’t always found on motherboards, but it does provide a rugged solution when the board can be bolted to the motherboard.

6. Swissbit’s USB Flash Module plugs into the nine-pin USB headers found on most motherboards.

Modules like mSATA and Swissbit’s USB Flash Module aren’t the only boards-based flash solutions. Flash memory also can be found in dual-inline memory module (DIMM) and small-outline DIMM (SODIMM) form factors, but there’s no standard for flash-only solutions as there is with DRAM.

On the other hand, several solutions like Viking Technology’s ArxCis-NV blend DRAM with flash memory (Fig. 7). The flash memory is used as a backup to store the contents of the DRAM when power is lost. A supercapacitor can provide sufficient power to perform the copy operation.

7. Viking Technology’s ArxCis-NV hybrid blends DDR3 DRAM with flash backup storage in a DDR3 DIMM form factor.

The challenge with using these types of hybrid memory is that the software needs to account for the nonvolatile feature. In the past, computers with magnetic core memory could be turned off and on without reloading the operating system or applications. This can save a significant amount of time and would be very handy for embedded applications.

These days, main memory is normally DRAM. Turn off the system and the contents of this memory are lost, so the default recovery process reboots the system. The boot program stored in flash normally remains constant, unlike these nonvolatile solutions that have stored the prior contents of the DRAM.

Most of these hybrid solutions target enterprise systems, but they can be easily incorporated into embedded applications because they use standard DIMM sockets and look like standard DDR2 or DDR3 DRAM to the system hardware.

Flashy PCI Express
Bandwidth is one thing flash memory can use, but many interfaces such as USB and SATA have restrictions that prevent full utilization of the speed of flash memory. PCI Express is one way to get data moving quickly.

The Non-Volatile Memory Host Controller Interface (NVMHCI) Working Group developed and manages NVM Express, which provides an interface to nonvolatile memory that, at this point, essentially means flash storage.

SCSI Express is another standard in the works that will bring flash storage directly to the PCI Express interface (see “Storage Standards Move Towards 12-Gbit/s Speeds”). The difference is that the interface is an SCSI adapter. SAS uses the SCSI command set, so it effectively defines a standard SAS interface. Conventional SAS controllers require device drivers from their respective vendors.

SATA Express from the Serial ATA Organization is a similar standard, except it provides a SATA interface. Like SCSI Express, SATA Express could just as easily deliver hard-disk storage via the interface along with flash storage.

NVM Express and SCSI Express serve the enterprise. Board and drive standards with hot-swap support are in the mix. These platforms may find their way into embedded systems as they become more common. They lend themselves to embedded applications because they provide a high-speed solution that can reside on the same board as the processing and networking hardware.

Standards Organizations
Most of the major flash-related organizations have already been mentioned, such as JEDEC, the ONFI Working Group and the NVMHCI Working Group. The SD Association is responsible for the SD card family of removable storage. Likewise, the CompactFlash Association handles the CompactFlash standard. T10 handles SCSI and SCSI Express. The Serial ATA Organization handles SATA Express.

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