Precision Programmable Current Sources Use Digital Pots

The circuit shown in Figure 1 implements a programmable 0- to 20-mA precision current source. The REF192 low-headroom 2.5-V voltage reference (U1) can source up to 30 mA. An AD5280 digital potentiometer (U2) controls the voltage-divider ratio of the reference voltage. U3, an OP1177 op amp, closes the loop by forcing V_L = V_W.

At the digital pot's zero scale, where V_WB ≈ 0 V, the voltage across R_SET will approach zero and no current will flow through the load. The reference output also will approach 0 V, forcing the GND node to 22.5 V. At the digital pot's full scale, the GND node will be forced to V_L and the reference output will thus be set to 2.50 V + V_L. Dividing the voltage across terminals B-to-W (V_REF× D/2^N) by R_SETcan determine the general equation for the load current. R_SET determines the range of achievable current

where V_REF = REF192 rated reference voltage, D = decimal equivalent of the AD5280 input code, and N = resolution of the AD5280. For best power efficiency, choose the lowest R_SET and the lowest V_REF that has adequate output-current capability to achieve the desired current.

With R_SET = 124.03 W and an R_LOAD of 24.85 W, 51.093 W, and 75.05 W, actual laboratory tests of the output current versus the 8-bit digital pot setting show close conformance to the ideal output as predicted by the equation (see the equation). Users should pay attention to the load impedance because V_L increases with the load, and it can't be driven beyond the op amp's rail. V_L also determines the voltage on the REF192's GND pin, thereby limiting the operating headroom.

The single-supply precision 0- to 100-mA programmable current source shown in Figure 2 can be used in applications such as laser diode drivers and tunable lasers that require a boosted current without compromising precision. With this circuit, the entire system can operate from a single +5-V supply, as opposed to the ±5-V supply required for the previous circuit.

This advantage comes from the voltage swing at the ground pin of the AD1582 voltage reference being now strictly positive. As a result, the AD5160 single-supply digital potentiometer and AD8532 single-supply op amps are employed. The same general current equation applies to this circuit (see the equation, again).

With R_SET = 24.82 W , and an R_LOAD of 5.185 W, 14.946 W, and 19.97 W, actual laboratory tests of the output current versus the 8-bit digital pot setting show close conformance to the ideal output, again as predicted by the above equation (see the equation, again).

It's important to note that a PMOS FET was used rather than an NMOS FET. If an NMOS FET were employed, the FET's source voltage would rise as the current increased, leading to a decrease in V_GS. This would limit the drain current, defeating the purpose of the circuit. The PMOS FET isn't prone to this problem because the source is tied to V_DD.

At first glance, the arrangement of the PMOS FET and AD8532 may seem like a positive feedback system. However, the PMOS placed in the feedback loop adds an extra inversion, providing overall negative feedback in the loop. Finally, the 100-kW version of the AD5160 was used to reduce the error voltage that arises from the voltage divider between R_AB and the non-ideal wiper resistance of the digital potentiometer.