Designers Must Look At Multiple Metrics To Pick The Best Core Silicon

Designers make few choices more important than selecting which chip or chips will perform the basic functions that define their systems' functionality. These chips, the "core silicon" of the system, can be any one of a variety of different types of ICs, such as ASICs, programmable logic devices (PLDs), or application-specific standard products (ASSPs).

Frequently, designers only consider ASICs and PLDs in evaluating the various alternatives for core silicon. This is understandable because engineers, being very creative, want to add unique features and value to their systems. Assessing the ASIC-PLD tradeoff, managers—if not design engineers—first tend to ask what these parts will cost.

Using cost as the only selection criterion results in a one-dimensional view of core silicon. PLDs, with their low nonrecurring engineering costs, should have all of the low-volume designs, and ASICs, with lower unit prices, the high-volume sockets. It is important to consider the true total cost, i.e., not just mask costs but the even more significant logic design, physical design, and verification costs.

Other factors may be equally or more important than cost, like system performance, time-to-market, system integration, schedule and cost risk, and supply-chain implications. Silicon cell-based ASICs generally win in performance and power consumption and allow for the incorporation of many more different types of functions on a single piece of silicon than PLDs. Time-to-market and schedule risk considerations, however, favor a PLD approach. And as commodity parts, PLDs have a supply chain advantage over the sole-source, sole-customer ASICs.

The ultimate criterion for choosing the type of IC to use for core silicon is where the value resides in the end system. If the system is feature-driven, where silicon can differentiate the end product, then ASICs or PLDs have the edge. Products that have become more commodity-like or are standards-driven are ideal candidates for ASSPs, and the move to these solutions is becoming a more significant trend in core silicon than just ASICs versus PLDs.