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The Rise of RISC-V: From University Lab to Global Force in Silicon Design

Nov. 17, 2023
How did RISC-V transform from a student project into an architecture that’s being used by organizations, universities, and governments around the world? Let’s dive into the history of RISC-V to find out.

This article is part of the TechXchange: RISC-V: The Instruction-Set Alternative.

What you’ll learn:

  • SiFive’s role in creating RISC-V and driving it forward.
  • How RISC-V transformed from a student project into a globally used architecture.
  • The importance of open-standard architecture.

RISC-V originated in academia as a summer project and later turned into a global phenomenon driving a new era of innovation in the semiconductor industry. Today, RISC-V is in more than 10 billion cores on the market, and it’s being used in a wide variety of applications from aerospace to automotive, data centers, the IoT, and beyond. So how did RISC-V transform from a student project into an architecture that’s being used by organizations, universities, and governments on a global scale?

RISC-V’s Roots

RISC-V was dreamed up in May 2010 at UC Berkeley’s Parallel Computing Laboratory (Par Lab). Professor Krste Asanović and graduate students Yunsup Lee and Andrew Waterman were looking for a processor core they could use for a summer research project. They considered using either x86 or the Arm instruction set architecture (ISA). However, the team quickly realized that even if they could negotiate a commercial agreement, they would not be able to customize the core—and, more importantly, they would be unable to share the results with other researchers.

Since there wasn’t a viable ISA on the market that met their needs, they decided to develop their own. By August 2010, the team came up with a new ISA that they called RISC-V, representing the fifth generation of reduced instruction set computer (RISC) designs.

The team continued to work on the architecture over the next year. They were joined by Dave Patterson, director of the Par Lab and one of the pioneers of early RISC designs. Patterson is also credited for having coined the term RISC, and he co-authored the book “RISC in Computer Architecture: A Quantitative Approach,” which is known as the standard text for processor design.

In May 2011, the team published the initial version of the RISC-V Instruction Set Manual and taped out the first hardware implementation of RISC-V on a 28-nm fully depleted silicon-on-insulator (FD-SOI).

The Forming of SiFive and RISC-V International

Over the next few years, the word about RISC-V spread and the creators realized that it held significant commercial potential. In fact, they later founded the RISC-V company SiFive. The creators held the first RISC-V Workshop in January 2015 to gather together developers interested in RISC-V.

Later that year, they launched the non-profit RISC-V Foundation (now called RISC-V International) to manage, guide, and promote RISC-V around the world. RISC-V International now acts as a standards body that continues to oversee the RISC-V standard with its collaborative group of technical, industry, domain, and special interest groups.

Why Opt for RISC-V?

Several aspects of RISC-V make the ISA stand out and have contributed to its impressive growth. As an open standard, anyone can use RISC-V for commercial, research, or individual use cases without proprietary restrictions or limitations. However, companies can still invest, develop, deploy, or license proprietary implementations for commercial purposes.

Since RISC-V was created with a clean slate design, it offers more flexibility, extensibility, and scalability than the closed architectures in the market that have decades of baggage. This has led to superior power, performance, and area implementations.

Companies also have the option of adding application-specific extensions designed for specific workloads, which is especially important for cutting-edge applications like AI and ML (Fig. 1). As a result, RISC-V is making custom silicon available to companies of all sizes.

RISC-V’s design freedom has spurred the rise of a new generation of startups, including SiFive which was founded in 2015. Asanović, Lee, and Waterman saw a growing need for high-quality, world-class RISC-V solutions in the commercial market, so they started SiFive to meet that demand.

Today, SiFive is valued at more than $2.5 billion and the company has secured more than 300 design wins from over 100 customers with its high-performance RISC-V IP. In 2010, it would have been hard for the founders of RISC-V to imagine that one day the technology they developed would be adopted by NASA for future space missions on Mars.

An Open Ecosystem

RISC-V International now has more than 3,800 members across 70 countries. The organization is made up of corporations (including some of the biggest tech companies), universities and research institutions, non-profit organizations, and individuals. The spirit of collaboration is what continues to drive the RISC-V ecosystem forward. Instead of everyone having to reinvent the wheel, they can build on the efforts of other developers and focus on innovation and differentiation (Fig. 2).

As an open standard, RISC-V is also unconstrained by borders. Anyone from anywhere can learn, create, and design with RISC-V. That’s why countries like India and China, along with the European Union, are all embracing RISC-V. At the recent RISC-V Summit Europe, Luis-Carlos Busquets-Perez, Administrator at the EU Commission, explained that RISC-V has “a very important economic impact in the European economy.”

While RISC-V had humble beginnings, it’s seen significant adoption and is reshaping the silicon industry as we know it. Industry giants and startups alike are using RISC-V to innovate, which has increased competition in the industry for the benefit of everyone. It’s become clear that the future of RISC-V has no limits.

Read more articles in the TechXchange: RISC-V: The Instruction-Set Alternative.

About the Author

Jack Kang | SVP of Business Development, Customer Experience (CX), and Corporate Marketing, SiFive

Jack Kang serves as the Senior Vice President of Customer Experience at SiFive. He oversees the Customer Experience Group, consisting of Field Application Engineers, Application Engineers, Technical Solution Managers and ASIC Program Managers. He’s responsible for all technical pre-sale activities for RISC-V IP, SoC IP, and silicon, as well as post-sale support and all customer program management until release to production.

Prior to SiFive, Jack held a variety of senior business development, product management, and product marketing roles at both NVIDIA and Marvell, with a long track record of very successful, large-scale design wins. Jack received his BS degree in Electrical Engineering and Computer Science from UC Berkeley.

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