Modern-day high-volume semiconductor manufacturing is a complex process that spans numerous stages and nodes. And with the ever increased focus on quality and cost, the manufacturing supply chain is getting fragmented both in terms of operations as well as geographical location. This modern environment demands highly specialized yet easy to use tools to do root-cause analysis for various operational and yield related issues. Wafer-mapping software has become one of the most popular tools to analyze data in the semiconductor manufacturing process to calculate reasons of yield loss and to identify operational efficiency affecting the semiconductor wafers and device yield.
Wafer map is not a recent phenomenon. The process of generating manual wafer maps dates back to 1970s when the primary purpose of generating wafer maps was to characterize the uniformity of the ion implantation of the semiconductor (primarily silicon) in use. There was no wafer map software back then, and the wafer maps were generated manually by noting down the values of the sheet resistance and ion-implantation uniformity. Wafer mapping back then was basically a graphical representation of consistency of the processes—primarily ion implantation—and sheet resistance on substrate, but now it is used to get more advanced intelligence such as die grading and to merge wafers in the map, dissect hard and soft bins, and perform many other operations. In the absence of a wafer-mapping system, the data collected during the manufacturing process is converted from a data table into 2D or 3D maps. These values are then represented on a color-coded map explaining the variations in the process and then can later be used to analyze the cause of the deviations. These deviations directly impact semiconductor wafer yield, and diagnosis of the cause can lead to improvement in yield, which directly benefits the bottom line.
In the absence of a powerful wafer map software, it is not an easy task to perform wafer-yield loss calculations because of various challenges:
- difficulty in collecting the data,
- lack of expertise to understand and analyze data,
- cumbersomeness of the whole process, and
- prioritizing engineering time to task critical activities and firefighting operational issues.
The modern day end-to-end yield-management solution provides a powerful wafer-mapping system that enables the user to collect, load, read, and create wafer maps in real-time from the customer’s semiconductor test data. The ability to visualize data with these wafer-mapping tools enables the user to analyze and understand the health of the wafers quickly in real-time and helps the engineers not only to slice and dice the wafer and analyze the data but also solve the issues that affect the quality negatively.
This type of analysis that let users to incorporate different plotting features and spatial patterns to determine the yield of wafer is really helpful and liked by test engineers. This graphical representation can be easily shared with other stakeholders including the executive management, making wafer mapping one of the most popular tool in semiconductor industry these days.
Irteza Ubaid is the senior strategy executive at yieldWerx, a data warehousing company that provides of a root cause analysis and automated monitoring and reporting tool that allows chipmakers to carry out data extraction, make transformations, and load product and lot genealogy data from ATE and MES systems. It enables engineers to efficiently find and correct systematic operational issues that impact yield and quality, which in turn leads to faster production ramps, higher yields, and lower manufacturing costs.
