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Compact 650-V SiC MOSFETs Boost Power Density, Efficiency in Industrial Equipment

July 1, 2025

The low figure of merit and enhanced packaging of Toshiba’s new MOSFETs contribute to higher efficiency in high-voltage power system designs.

Lee Goldberg

Related To:

Electronic Design

Toshiba Electronics announced volume shipments of its third-generation, 650-V silicon-carbide (SiC) MOSFETs— the TW031V65C, TW054V65C, TW092V65C, and TW123V65C—in the compact DFN8x8 package for industrial equipment.

Fabricated in the company’s next-generation process, the devices exhibit consistently low drain-source on-resistance (R_DS(on)) temperature coefficient. The resulting (R_DS(on)) × gate-drain charge (Q_gd) figure of merit (FOM) delivers enhanced power density and efficiency for demanding high-voltage applications, including switched-mode power supplies (SMPS), electric-vehicle (EV) charging stations, uninterruptible power supplies (UPS), and photovoltaic inverters.

In addition, the multi-pin device allows a Kelvin connection of its signal-source pin for the gate drive, which reduces the inductance influence in the source wire within the package. It can reduce turn-on loss by as much as 55% and turn-off loss by as much as 25% compared to existing Toshiba products.

The devices’ surface-mount DFN8x8 package reduces volume by more than 90% compared to existing lead-inserted packages, such as TO-247 and TO-247-4L(X), while also reducing parasitic impedance.

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About the Author

Lee Goldberg | Contributing Editor

Lee Goldberg is a self-identified “Recovering Engineer,” Maker/Hacker, Green-Tech Maven, Aviator, Gadfly, and Geek Dad. He spent the first 18 years of his career helping design microprocessors, embedded systems, renewable energy applications, and the occasional interplanetary spacecraft. After trading his ‘scope and soldering iron for a keyboard and a second career as a tech journalist, he’s spent the next two decades at several print and online engineering publications.

Lee’s current focus is power electronics, especially the technologies involved with energy efficiency, energy management, and renewable energy. This dovetails with his coverage of sustainable technologies and various environmental and social issues within the engineering community that he began in 1996. Lee also covers 3D printers, open-source hardware, and other Maker/Hacker technologies.

Lee holds a BSEE in Electrical Engineering from Thomas Edison College, and participated in a colloquium on technology, society, and the environment at Goddard College’s Institute for Social Ecology. His book, “Green Electronics/Green Bottom Line - A Commonsense Guide To Environmentally Responsible Engineering and Management,” was published by Newnes Press.

Lee, his wife Catherine, and his daughter Anwyn currently reside in the outskirts of Princeton N.J., where they masquerade as a typical suburban family.

Lee also writes the regular PowerBites series.