CXL for Memory and More

The new memory module, one of the components within a 2-TB Pooled CXL Memory System, takes on the challenges wrought by AI and ML.

Intel’s Agilex 7 with R-Tile support works with PCIe 5.0 and CXL.

The co-founder of UnifabriX reviews where CXL fits into the future of memory in the data center.

This year’s Hot Chips event featured a tutorial on the fast-rising CXL standard and its latest iteration—CXL 3.

Astera Labs delivers CXL-attached memory controllers for high-volume deployment.

Compute Express Link is a high-speed interconnect offering coherency and memory semantics using high-bandwidth, low-latency connectivity between host processor and devices such...

Microchip's new SMC 2000 series helps open the door to CXL-attached memory in the data center.

In response to an exponential growth in data, the industry is on the threshold of a groundbreaking architectural shift that will fundamentally change the performance, efficiency...

The recently announced Universal Chiplet Interconnect Express standard, based on PCIe and CXL, will help simplify chip design.

The capabilities and promise of CXL 2.0 allow us to take data-center architecture and design to a new level.

Steve Woo from RAMBUS talks about the Compute Express Link and its impact on the data center.

Compute Express Link is a cache-coherent interconnect for processors, memory expansion, and accelerators that maintains a unified coherent memory space between the CPU and any...

Read this article online.The Compute Express Link (CXL) is an open industry-standard interconnect offering coherency and memory semantics using high-bandwidth and low-latency ...

Memory infrastructure gets a boost: OpenCAPI and its OMI subset, along with the CXL, ratchet up performance to address near-memory domain bottlenecks, while Gen-Z focuses on rack...