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  • Designing with Chiplets

    Mixing dies, interposers and designs to fabricate new solutions
    Hseyin/Adobe Stock
    Trends in 2025 Chiplet Design
    April 23, 2025
    Find out how chip packaging and chiplets will deliver more AI acceleration in the data center.
    Arm
    arm_csa_standard_promo_image_web
    Jan. 23, 2025
    The new standard will enable companies to design custom chiplets within a shared interconnect ecosystem.
    Dreamstime_jaroonittiwannapong and Broadcom
    chipprocessor_dreamstime_jaroonittiwannapong_35384
    Jan. 16, 2025
    The tech integrates 2.5D packaging technology and 3D silicon stacking to usher in the next generation of “superchips” for AI.
    Dreamstime
    cadence_chiplet_promo_dreamstime
    Dec. 18, 2024
    Learn more about the motivations behind Cadence’s new Arm-based system chiplet in the latest installment of The Briefing.
    Warenemy_30451502_promo
    dreamstime_warenemy_30451502_promo
    Sept. 17, 2024
    Avicena’s founder and CEO breaks down the challenges of intra-chip data management and how his company’s LightBundle platform offers a solution.

    More content from Designing with Chiplets

    Intel
    Aug. 13, 2024
    Learn more about the UCIe 2.0 specification and how it could untangle the technical and business challenges holding back the future of chiplets.
    Siemens
    July 24, 2024
    The company rolled out Calibre 3D Thermal to help deliver fast and accurate die-level thermal analysis of 3D IC designs.
    Ansys
    July 15, 2024
    Learn how Ansys leverages NVIDIA’s Omniverse to unlock the future of 2.5D and 3D multi-die systems.
    June 27, 2024
    Mixing dies, interposers, and designs to fabricate new solutions.
    Intel
    June 27, 2024
    Intel paired one of its CPUs with an optical compute interconnect (OCI) chiplet.
    Heterogeneous 2
    June 3, 2024
    Siemens’ Xpedition Substrate Integrator provides co-design prototyping and planning of 2.5/3D chips.
    Chiplets connected via the Universal Chiplet Interconnect Express
    May 25, 2024
    Cadence's UCIe demo presents key features and interoperability support, and also discusses the future of chiplet technology in high-performance SoCs.
    Eliyan
    April 22, 2024
    Discover how the Universal Memory Interface tackles substrate- and die-level real-estate challenges in chiplet-based design, unlocking performance and scalability.
    Intel
    April 11, 2024
    The company’s next-gen AI silicon adds more accelerator cores, faster networking, and extra high-bandwidth memory.
    Andrei Dzemidzenka, Dreamstime
    April 3, 2024
    Learn more about Pike Creek and its potential implications as the first test chip featuring chiplets linked by the UCIe standard.
    How Chiplets Accelerate Generative AI Applications
    March 27, 2024
    This superpanel explores the role of chiplets in advancing ever-expanding generative AI technology.
    86230086 © Flynt | Dreamstime.com
    March 20, 2024
    When it comes to chiplets, it’s all about packaging technology.
    What will Chiplets Look Like in 2029?
    March 11, 2024
    Wrapping up the 2024 Chiplet Summit, this panel session discussed the huge advantages and persistent challenges presented by chiplets.
    Multi-Die Systems Set the Stage for Innovation
    Feb. 21, 2024
    Abhijeet Chakraborty, Vice President of Engineering at Synopsys, in his keynote at the 2024 Chiplet Summit, said that last year was an inflection point for multi-die systems.
    91824901 © Forance | Dreamstime.com
    Feb. 8, 2024
    Explore Keysight’s Chiplet PHY Designer tool and the game-changing UCIe standard in chip design.
    NVIDIA
    Jan. 22, 2024
    The Chiplet Summit is coming up at the beginning of February. I hope to meet up with you there.
    Intel
    Dec. 14, 2023
    Intel’s latest data-center CPU is a prelude to the process and packaging innovations it has in store for 2024.
    Can Chiplets Solve Semiconductor Challenges?
    Dec. 13, 2023
    With the right investments, chiplets can help solve long-standing industry challenges such as increasing costs and supply disruptions, resulting in a world where devices are more...
    17001699 © Toniflap | Dreamstime.com
    Oa Dreamstime L 17001699
    Nov. 2, 2023
    Jim Handy’s crystal ball reveals trends about many topics, ranging from memory chips to generative AI.
    Maxresdefault 65303d64c15e8
    Oct. 19, 2023
    Intel is looking to use glass, which has strong thermal and mechanical characteristics, as a substrate for chiplets.
    Synopsys
    Promo Multi Die Synopsiys Web
    Oct. 3, 2023
    Explore the main driving forces behind today’s multi-die systems, how they’re becoming the choice system architecture, and how they’re catalyzing the next wave of semiconductor...
    AMD
    Amd Versal Promo
    July 7, 2023
    The Versal Premium adaptive System-on-Chip (SoC) targets EDA simulation and verification applications.
    Marian_Mocanu_Dreamstime
    Promo Marian Mocanu Dreamstime
    May 24, 2023
    Intel’s Agilex 7 with R-Tile support works with PCIe 5.0 and CXL.
    AMD
    3 D Hybrid Bonding
    June 21, 2022
    AMD will utilize a range of 2.5D and 3D chiplets to integrate systems that will include the company's FPGA technology.
    zGlue
    Ucie Promo
    March 10, 2022
    The recently announced Universal Chiplet Interconnect Express standard, based on PCIe and CXL, will help simplify chip design.
    Ed Promo 3
    Feb. 15, 2021
    Chiplets – Electronic Design Automation Insights
    zGlue
    Ces Z Glue Promo
    Jan. 6, 2020
    zGlue’s ChipBuilder Pro lets designers create chips using its 2.5D chiplet Smart Fabric.
    Tsmc Arm Chiplets Promo
    Oct. 9, 2019
    TSMC Works With Arm to Chart Future of Chiplets
    Intel-Neuromorphic-system-2.jpg
    July 16, 2019
    Intel Adds New Technology to Advanced Packaging Arsenal
    Intel_Manufacturing_Wafer_Promo
    Dec. 14, 2018
    Intel Introduces New Way to Stack Chips on Top of Each Other
    The zGlue chip
    Aug. 21, 2017
    This silicon interposer fabric lets developers integrate multiple die into a single, compact chip. It is ideal for compact form factors needed for applications like wearable devices...